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Data Sheet No. PD-6.028C
IR2111
HALF-BRIDGE DRIVER
Features
n Floating channel designed for bootstrap operation
Fully operational to +600V Tolerant to negative transient voltage dV/dt immune n Gate drive supply range from 10 to 20V n Undervoltage lockout for both channels n CMOS Schmitt-triggered inputs with pull-down n Matched propagation delay for both channels n Internally set deadtime n High side output in phase with input
Product Summary
VOFFSET IO+/VOUT ton/off (typ.) Deadtime (typ.) 600V max. 200 mA / 420 mA 10 - 20V 850 & 150 ns 700 ns
Description
The IR2111 is a high voltage, high speed power MOSFET and IGBT driver with dependent high and low side referenced output channels designed for half-bridge applications. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. Logic input is compatible with standard CMOS outputs. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Internal deadtime is provided to avoid shoot-through in the output half-bridge. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
Packages
Typical Connection
up to 600V VCC
VCC
IN
VB HO VS
TO LOAD
IN COM LO
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CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
B-39
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IR2111
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 7 through 10.
Symbol
VB VS VHO VCC VLO VIN dV s/dt PD RJA TJ TS TL
Parameter Definition
High Side Floating SupplyVoltage High Side Floating Supply Offset Voltage High Side Floating OutputVoltage Low Side and Logic Fixed Supply Voltage Low Side Output Voltage Logic InputVoltage Allowable Offset SupplyVoltage Transient (Figure 2) Package Power Dissipation @ TA +25C Thermal Resistance, Junction to Ambient JunctionTemperature Storage Temperature LeadTemperature (Soldering, 10 seconds) (8 Lead DIP) (8 Lead SOIC) (8 Lead DIP) (8 Lead SOIC)
Value Min.
-0.3 VB - 25 VS - 0.3 -0.3 -0.3 -0.3 -- -- -- -- -- -- -55 --
Max.
625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 50 1.0 0.625 125 200 150 150 300
Units
V
V/ns W C/W
C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
VB VS VHO VCC VLO VIN TA
Parameter Definition
High Side Floating Supply AbsoluteVoltage High Side Floating Supply Offset Voltage High Side Floating OutputVoltage Low Side and Logic Fixed Supply Voltage Low Side Output Voltage Logic InputVoltage AmbientTemperature
Value Min.
VS + 10 Note 1 VS 10 0 0 -40
Max.
VS + 20 600 VB 20 VCC VCC 125
Units
V
C
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS.
B-40
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
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IR2111
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, CL = 1000 pF and TA = 25C unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3.
Symbol
t on t off tr tf DT MT
Parameter Definition
Turn-On Propagation Delay Turn-Off Propagation Delay Turn-On Rise Time Turn-Off Fall Time Deadtime, LS Turn-Off to HS Turn-On & HS Turn-Off to LS Turn-On Delay Matching, HS & LS Turn-On/Off
Value Min. Typ. Max. Units Test Conditions
-- -- -- -- -- -- 850 150 80 40 700 30 1,000 180 130 65 900 -- ns VS = 0V VS = 600V
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V and TA = 25C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
VIH
Parameter Definition
Logic "1" Input Voltage for HO & Logic "0" for LO
Value Min. Typ. Max. Units Test Conditions
6.4 9.5 12.6 -- -- -- -- -- -- -- -- -- 50 70 20 -- 8.4 8.1 8.6 8.2 250 500 -- -- -- 3.8 6.0 8.3 100 100 50 100 180 40 1.0 9.5 9.2 9.6 9.2 -- -- mA VO = 0V, VIN = VCC PW 10 s VO = 15V, VIN = 0V PW 10 s V A mV V VCC = 10V VCC = 15V VCC = 20V VCC = 10V VCC = 15V VCC = 20V IO = 0A IO = 0A VB = VS = 600V VIN = 0V or VCC VIN = 0V or VCC VIN = VCC VIN = 0V
VIL
Logic "0" Input Voltage for HO & Logic "1" for LO
-- -- --
VOH VOL I LK I QBS IQCC IIN+ IINVBSUV+ VBSUVVCCUV+ VCCUVIO+ I O-
High Level Output Voltage, VBIAS - VO Low Level Output Voltage, VO Offset Supply Leakage Current Quiescent VBS Supply Current Quiescent VCC Supply Current Logic "1" Input Bias Current Logic "0" Input Bias Current VBS Supply Undervoltage Positive Going Threshold VBS Supply Undervoltage Negative Going Threshold VCC Supply Undervoltage Positive Going Threshold VCC Supply Undervoltage Negative Going Threshold Output High Short Circuit Pulsed Current Output Low Short Circuit Pulsed Current
-- -- -- -- -- -- -- 7.3 7.0 7.6 7.2 200 420
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CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-41
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IR2111
Functional Block Diagram
VB UV DETECT DEAD TIME PULSE GEN IN UV DETECT
HV LEVEL SHIFT
R R S
Q HO
PULSE FILTER
VS
VCC
LO DEAD TIME COM
Lead Definitions
Lead Symbol Description
IN VB HO VS VCC LO COM Logic input for high side and low side gate driver outputs (HO & LO), in phase with HO High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return
Lead Assignments
8 Lead DIP
SO-8
IR2111 Part Number
B-42 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
IR2111S
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IR2111
Device Information
Process & Design Rule Transistor Count Die Size Die Outline HVDCMOS 4.0 m 164 70 X 96 X 26 (mil)
Thickness of Gate Oxide Connections First Layer
Second Layer Contact Hole Dimension Insulation Layer Passivation Method of Saw Method of Die Bond Wire Bond Leadframe
Material Width Spacing Thickness Material Width Spacing Thickness Material Thickness Material Thickness
Package Remarks:
Method Material Material Die Area Lead Plating Types Materials
800A Poly Silicon 4 m 6 m 5000A Al - Si (Si: 1.0% 0.1%) 6 m 9 m 20,000A 8 m X 8 m PSG (SiO2) 1.5 m PSG (SiO2) 1.5 m Full Cut Ablebond 84 - 1 Thermo Sonic Au (1.0 mil / 1.3 mil) Cu Ag Pb : Sn (37 : 63) 8 Lead PDIP / SO-8 EME6300 / MP150 / MP190
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CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-43
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IR2111
IN
HO
LO
Figure 1. Input/Output Timing Diagram
Figure 2. Floating Supply Voltage Transient Test Circuit
IN(LO)
50% 50%
IN(HO)
t on tr 90% t off 90% tf
LO HO
Figure 3. Switching Time Test Circuit
10%
10%
Figure 4. Switching Time Waveform Definition
IN (LO)
50% 50% 50% 50%
IN
IN (HO) LO HO
10% 10% DT MT 90% 10% MT
90%
HO LO
90%
LO
HO
Figure 5. Deadtime Waveform Definitions
Figure 6. Delay Matching Waveform Definitions
B-44
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
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IR2111
150
320V 140V
150
320V
140V
125 Junction Temperature (C) Junction Temperature (C)
125
100
100
10V
75
10V
75
50
50
25
25
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
Figure 7. IR2111 TJ vs. Frequency (IRFBC20) RGATE = 33, VCC = 15V
Figure 8. IR2111 TJ vs. Frequency (IRFBC30) RGATE = 22 , VCC = 15V
150
320V 140V
10V
150
320V 140V 10V
125 Junction Temperature (C) Junction Temperature (C) 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
125
100
100
75
75
50
50
25
25
0 1E+2
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
Figure 9. IR2111 TJ vs. Frequency (IRFBC40) RGATE = 15, VCC = 15V
Figure 10. IR2111 TJ vs. Frequency (IRFPE50) RGATE = 10 , VCC = 15V
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CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-45


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